The development of microelectronic circuitry is presently one of the most active areas of technological advancement, and therefore demands substantial economic and infrastructure resources. To recoup their investment and maintain a competitive position in the marketplace, microelectronic device manufacturers strive to protect their cutting-edge technologies from unauthorized disclosure. Once the development of microelectronic components reaches the manufacturing stage, however, and the devices are distributed to customers or otherwise fall into the hands of third parties, manufacturers lose a great deal of control over their respective technologies. At that point, undesired reverse engineering by third parties becomes a significant concern.
It is the microprocessor element of the chip package that generally contains the sensitive, cutting-edge technology that is sought to be protected from disclosure. With prior art microchip devices, third parties may isolate the microprocessor for detailed evaluation by removing it from the chip package by, for example, grinding or separating (cutting) the substrate or lid to expose the microprocessor chip. The exposed microprocessor chip may then be analyzed with a suitable device, such as a microscope, thereby enabling the unauthorized third party to gain access to valuable trade secret information. Lockable cases or the like are insufficient because these may be cut away and removed to expose the chip package, which may then be reverse engineered as described above.
Presently, no known effective method prevents reverse engineering; third parties, after coming into physical possession of the sensitive technological devices, can take them to a laboratory and manipulate them at will. There is a need, therefore, to provide a chip level package that will frustrate or defeat third party attempts to reverse engineer sensitive technologies, even when the third parties have uninhibited access to the microprocessor chip package.
The most effective method of protection would be a quality inherent in the chip package itself, which would serve to destroy microprocessor components if attempts at reverse engineering are made. In particular, this could be accomplished by a chip package that would result in destruction of the microprocessor upon attempts to separate the chip from the chip package components, such as the substrate or lid, before attempts could be made to analyze it under a microscope. Destruction of the microprocessor, as described, would further prevent the extraction of sensitive software or memory stored in the chip.
Integrated circuit boards are constructed by depositing a conductive or semi-conductive layer onto a non-conductive board or substrate. A chip trace is then laid out on the board with a protective, chemically-inert coating. An etchant is applied to the surface of the board, which dissolves the portion of the conductive or semi-conductive layer not protected by the coating. The coating is then removed, leaving the bare chip trace behind.
Certain chemical processes typically used in the microprocessor manufacturing industry may be incorporated into tamper-resistant microprocessor chip packages. One of these chemical processes involves the etching of the chip circuitry.
U.S. Pat. No. 7,494,608 issued to Li et al. for STABILIZED SILVER NANOPARTICLE COMPOSITION discloses an example of a fluid that may be suitable for use with the present invention. Therein is described a composition comprising a liquid and a plurality of silver-containing nanoparticles with a stabilizer, wherein the silver-containing nanoparticles are a product of a reaction of a silver compound with a reducing agent comprising a hydrazine compound in the presence of a thermally removable stabilizer in a reaction mixture comprising the silver compound, the reducing agent, the stabilizer, and an organic solvent wherein the hydrazine compound is a hydrocarbyl hydrazine, a hydrocarbyl hydrazine salt, a hydrazide, a carbazate, and sulfonohydrazide, or a mixture thereof, and wherein the stabilizer includes an organoamine. Electronic circuit elements may be fabricated by depositing a composition comprising a liquid and a plurality of silver-containing nanoparticles with a stabilizer on a substrate by a liquid deposition technique to form a deposited composition.
It is believed that the present invention contains a high degree of novelty in the field of microelectronic devices. No known prior art is closely related to the technology disclosed herein. A brief discussion of prior art references is presented below, however, as a point of comparison.
In U.S. Pat. No. 7,685,438 issued to Knudsen for TAMPER-RESISTANT PACKAGING AND APPROACH USING MAGNETICALLY-SET DATA there is described a tamper-resistant packaging approach that protects an integrated circuit from undesirable access. According to an example embodiment, data is encrypted as a function of the state of a plurality of magnetically-responsive circuit element and then decrypted as a function of the state. A package is arranged to prevent access to the integrated circuit and having magnetic particles therein. The magnetic particles are arranged to cause the magnetically-responsive circuit elements to take on a state that is used to encrypt the data. The state of these elements is again used to decrypt the data (e.g., as a key). When the magnetic particles are altered, for example by removing a portion of the package, the state of one or more of the magnetically-responsive circuit elements is changed, thus rendering the state incapable of being used for decrypting the data.
Under certain circumstances, encryption of integrated circuit data and subsequent decryption by use of a magnetic key could offer sufficient protection of sensitive data electronically stored on a chip. In other circumstances, however, a more robust form of protection may be necessary. Magnetic encryption/decryption technology, for instance, would not protect the chip architecture from reverse engineering by third parties. Moreover, damage or destruction to the chip components, as described hereinbelow, will permanently render the information contained thereon unreadable.
U.S. Pat. No. 4,236,463 issued to Westcott for TAMPER PROOF CASE FOR THE PROTECTION OF SENSITIVE PAPERS describes a technology for protecting sensitive papers. A carrying case having a hinged lid, with handle and locks, contains internal components that will be destroyed during a tampering event. Within the interior of the case and hingedly connected to the case is a liner, within which are stored sensitive papers. A thermite charge is disposed within a removable boat in the liner and has igniters electrically connected, through a selectively positionable key operated switch, to a battery and through various switch members so that the igniters are triggered upon the occurrence of one of various tampering events. Upon the making of an electrical circuit, the igniters ignite the thermite charge to burn or char the papers, the gases escaping through an opening in the lid of the case. The similarity between this and the present invention is the permanent destruction of sensitive, internal components upon tampering. While conceptually similar, the present invention obviously operates on a much smaller scale and achieves its intended function by very different means.
The inventors are not aware of any technologies that provide tamper-resistance for a microprocessor package, in which the anti-tampering mechanism is integrated into the chip package and capable of destroying the microprocessor. In particular, there are no known technologies that make use of fluids and/or nanofluids to etch, sinter, or thermally destroy microprocessor chip components during a tampering event.